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authorOswald Buddenhagen <oswald.buddenhagen@gmx.de>2023-04-22 18:10:15 +0200
committerTakashi Iwai <tiwai@suse.de>2023-04-23 09:15:13 +0200
commita869057cd639ed41a1b16bc072fb20cb1ed1dc51 (patch)
treea25325df0d46bdbae48fbb391e2dac1ffb19cc45 /sound/pci/emu10k1/emumixer.c
parentALSA: emu10k1: fix snd_emu1010_fpga_read() input masking for rev2 cards (diff)
downloadwireguard-linux-a869057cd639ed41a1b16bc072fb20cb1ed1dc51.tar.xz
wireguard-linux-a869057cd639ed41a1b16bc072fb20cb1ed1dc51.zip
ALSA: emu10k1: comment updates
Move comments to better locations, de-duplicate, fix/remove incorrect/ outdated ones, add new ones, and unify spacing somewhat. While at it, also add testing credits for Jonathan Dowland (SB Live! Platinum) and myself (E-MU 0404b). Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de> Link: https://lore.kernel.org/r/20230422161021.1143903-2-oswald.buddenhagen@gmx.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/emu10k1/emumixer.c')
-rw-r--r--sound/pci/emu10k1/emumixer.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/sound/pci/emu10k1/emumixer.c b/sound/pci/emu10k1/emumixer.c
index 754d91050af2..3d2ed5e0a59d 100644
--- a/sound/pci/emu10k1/emumixer.c
+++ b/sound/pci/emu10k1/emumixer.c
@@ -346,7 +346,7 @@ static const unsigned int emu1616_output_dst[] = {
};
/*
- * Data destinations - HANA outputs going to Alice2 (audigy) for
+ * Data destinations - FPGA outputs going to Alice2 (Audigy) for
* capture (EMU32 + I2S links)
* Each destination has an enum mixer control to choose a data source
*/
@@ -367,6 +367,7 @@ static const unsigned int emu1010_input_dst[] = {
EMU_DST_ALICE2_EMU32_D,
EMU_DST_ALICE2_EMU32_E,
EMU_DST_ALICE2_EMU32_F,
+ /* These exist only on rev1 EMU1010 cards. */
EMU_DST_ALICE_I2S0_LEFT,
EMU_DST_ALICE_I2S0_RIGHT,
EMU_DST_ALICE_I2S1_LEFT,
@@ -708,7 +709,7 @@ static int snd_emu1010_internal_clock_put(struct snd_kcontrol *kcontrol,
/* 44100 */
/* Mute all */
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE );
- /* Default fallback clock 48kHz */
+ /* Default fallback clock 44.1kHz */
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_44_1K );
/* Word Clock source, Internal 44.1kHz x1 */
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK,