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authorTakashi Iwai <tiwai@suse.de>2020-04-21 21:41:36 +0200
committerTakashi Iwai <tiwai@suse.de>2020-04-21 21:41:36 +0200
commite7b6b3ec01c1dddfa8418381f34a0dcbb0731eda (patch)
tree0a24ee45fbc8abbb3999c658f4b4a2f03271d687 /sound/soc/codecs/sgtl5000.c
parentALSA: usb-audio: Apply async workaround for Scarlett 2i4 2nd gen (diff)
parentASoC: wm8960: Fix wrong clock after suspend & resume (diff)
downloadwireguard-linux-e7b6b3ec01c1dddfa8418381f34a0dcbb0731eda.tar.xz
wireguard-linux-e7b6b3ec01c1dddfa8418381f34a0dcbb0731eda.zip
Merge tag 'asoc-fix-v5.7-rc2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v5.7 Quite a lot of fixes here, a lot of driver specific ones but the biggest one is the revert of changes to the startup and shutdown sequence for DAIs that went in during the merge window - they broke some older x86 platforms and attempts to fix them didn't succeed so it's safer to just roll them back and try to make sure those platforms are handled properly in any future attempt. The rockchip S/PDIF DT stuff was IIRC for validation issues.
Diffstat (limited to 'sound/soc/codecs/sgtl5000.c')
-rw-r--r--sound/soc/codecs/sgtl5000.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index d5130193b4a2..e8a8bf7b4ffe 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -1653,6 +1653,40 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
dev_err(&client->dev,
"Error %d initializing CHIP_CLK_CTRL\n", ret);
+ /* Mute everything to avoid pop from the following power-up */
+ ret = regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_CTRL,
+ SGTL5000_CHIP_ANA_CTRL_DEFAULT);
+ if (ret) {
+ dev_err(&client->dev,
+ "Error %d muting outputs via CHIP_ANA_CTRL\n", ret);
+ goto disable_clk;
+ }
+
+ /*
+ * If VAG is powered-on (e.g. from previous boot), it would be disabled
+ * by the write to ANA_POWER in later steps of the probe code. This
+ * may create a loud pop even with all outputs muted. The proper way
+ * to circumvent this is disabling the bit first and waiting the proper
+ * cool-down time.
+ */
+ ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, &value);
+ if (ret) {
+ dev_err(&client->dev, "Failed to read ANA_POWER: %d\n", ret);
+ goto disable_clk;
+ }
+ if (value & SGTL5000_VAG_POWERUP) {
+ ret = regmap_update_bits(sgtl5000->regmap,
+ SGTL5000_CHIP_ANA_POWER,
+ SGTL5000_VAG_POWERUP,
+ 0);
+ if (ret) {
+ dev_err(&client->dev, "Error %d disabling VAG\n", ret);
+ goto disable_clk;
+ }
+
+ msleep(SGTL5000_VAG_POWERDOWN_DELAY);
+ }
+
/* Follow section 2.2.1.1 of AN3663 */
ana_pwr = SGTL5000_ANA_POWER_DEFAULT;
if (sgtl5000->num_supplies <= VDDD) {