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| author |   Cezary Rojewski <cezary.rojewski@intel.com> | 2024-02-20 12:50:31 +0100 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2024-02-20 13:19:56 +0000 |
| commit | 8a6502ade116bc4b8293f094f8d74059c67c3f27 (patch) | |
| tree | b9fd1becdef8c9f1cba916b1f49e62cef1e643e0 /sound/soc/intel/avs/registers.h | |
| parent | ASoC: Intel: avs: Abstract IRQ handling (diff) | |
| download | wireguard-linux-8a6502ade116bc4b8293f094f8d74059c67c3f27.tar.xz wireguard-linux-8a6502ade116bc4b8293f094f8d74059c67c3f27.zip | |
ASoC: Intel: avs: CNL-based platforms support
Define handlers specific to cAVS 1.8 platforms, that is CNL, CFL, CML
and all other variants based on this very version of AudioDSP
architecture. Most operations are inherited from their predecessors.
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240220115035.770402-7-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/avs/registers.h')
| -rw-r--r-- | sound/soc/intel/avs/registers.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/sound/soc/intel/avs/registers.h b/sound/soc/intel/avs/registers.h index 8468acd15c3d..6126adca500c 100644 --- a/sound/soc/intel/avs/registers.h +++ b/sound/soc/intel/avs/registers.h @@ -50,6 +50,21 @@ #define SKL_ADSP_HIPCIE_DONE BIT(30) #define SKL_ADSP_HIPCT_BUSY BIT(31) +/* CNL Intel HD Audio Inter-Processor Communication Registers */ +#define CNL_ADSP_IPC_BASE 0xC0 +#define CNL_ADSP_REG_HIPCTDR (CNL_ADSP_IPC_BASE + 0x00) +#define CNL_ADSP_REG_HIPCTDA (CNL_ADSP_IPC_BASE + 0x04) +#define CNL_ADSP_REG_HIPCTDD (CNL_ADSP_IPC_BASE + 0x08) +#define CNL_ADSP_REG_HIPCIDR (CNL_ADSP_IPC_BASE + 0x10) +#define CNL_ADSP_REG_HIPCIDA (CNL_ADSP_IPC_BASE + 0x14) +#define CNL_ADSP_REG_HIPCIDD (CNL_ADSP_IPC_BASE + 0x18) +#define CNL_ADSP_REG_HIPCCTL (CNL_ADSP_IPC_BASE + 0x28) + +#define CNL_ADSP_HIPCTDR_BUSY BIT(31) +#define CNL_ADSP_HIPCTDA_DONE BIT(31) +#define CNL_ADSP_HIPCIDR_BUSY BIT(31) +#define CNL_ADSP_HIPCIDA_DONE BIT(31) + /* Intel HD Audio SRAM windows base addresses */ #define SKL_ADSP_SRAM_BASE_OFFSET 0x8000 #define SKL_ADSP_SRAM_WINDOW_SIZE 0x2000 |