diff options
author | Peter Ujfalusi <peter.ujfalusi@linux.intel.com> | 2023-09-15 14:40:16 +0300 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2023-09-15 13:15:32 +0100 |
commit | 369ea9f82c279e88a52217b56dc1f973de57ac56 (patch) | |
tree | d055194325559117fdc77d43f342776775367a2e /sound/soc/sof/intel | |
parent | ASoC: SOF: ipc4: Convert status code 2 and 15 to -EOPNOTSUPP (diff) | |
download | wireguard-linux-369ea9f82c279e88a52217b56dc1f973de57ac56.tar.xz wireguard-linux-369ea9f82c279e88a52217b56dc1f973de57ac56.zip |
ASoC: SOF: Intel: hda: Add definition for SDxFIFOS.FIFOS mask
The FIFOS (FIFO Size) field is in bit 0-15 of the register.
Use the defined mask instead of a magic number for the FIFOS value
masking in hda_dsp_stream_hw_params().
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Chao Song <chao.song@linux.intel.com>
Link: https://lore.kernel.org/r/20230915114018.1701-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/sof/intel')
-rw-r--r-- | sound/soc/sof/intel/hda-stream.c | 2 | ||||
-rw-r--r-- | sound/soc/sof/intel/hda.h | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/sound/soc/sof/intel/hda-stream.c b/sound/soc/sof/intel/hda-stream.c index 0b0087abcc50..65e9242365be 100644 --- a/sound/soc/sof/intel/hda-stream.c +++ b/sound/soc/sof/intel/hda-stream.c @@ -668,7 +668,7 @@ int hda_dsp_stream_hw_params(struct snd_sof_dev *sdev, snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, sd_offset + SOF_HDA_ADSP_REG_SD_FIFOSIZE); - hstream->fifo_size &= 0xffff; + hstream->fifo_size &= SOF_HDA_SD_FIFOSIZE_FIFOS_MASK; hstream->fifo_size += 1; } else { hstream->fifo_size = 0; diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h index 5c517ec57d4a..2b228c63905b 100644 --- a/sound/soc/sof/intel/hda.h +++ b/sound/soc/sof/intel/hda.h @@ -135,6 +135,9 @@ #define SOF_HDA_ADSP_REG_SD_BDLPU 0x1C #define SOF_HDA_ADSP_SD_ENTRY_SIZE 0x20 +/* SDxFIFOS FIFOS */ +#define SOF_HDA_SD_FIFOSIZE_FIFOS_MASK GENMASK(15, 0) + /* CL: Software Position Based FIFO Capability Registers */ #define SOF_DSP_REG_CL_SPBFIFO \ (SOF_HDA_ADSP_LOADER_BASE + 0x20) |