aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
diff options
context:
space:
mode:
authorJohn Garry <john.garry@huawei.com>2018-03-08 18:58:35 +0800
committerArnaldo Carvalho de Melo <acme@redhat.com>2018-03-16 13:54:53 -0300
commitafe4d089621d4d90ac0e089b83752ea4515325ac (patch)
treea11fa96b5b032972394d01d35128b6662404c9bb /tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
parentperf vendor events arm64: Fixup ThunderX2 to use recommended events (diff)
downloadwireguard-linux-afe4d089621d4d90ac0e089b83752ea4515325ac.tar.xz
wireguard-linux-afe4d089621d4d90ac0e089b83752ea4515325ac.zip
perf vendor events arm64: fixup A53 to use recommended events
This patch fixes the ARM Cortex-A53 json to use event definition from the ARMv8 recommended events. In addition to this change, other changes were made: - remove stray ',' - remove mirrored events in memory.json and bus.json - fixed indentation to be consistent with other ARM JSONs Signed-off-by: John Garry <john.garry@huawei.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Shaokun Zhang <zhangshaokun@hisilicon.com> Cc: Will Deacon <will.deacon@arm.com> Cc: William Cohen <wcohen@redhat.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lkml.kernel.org/r/1520506716-197429-11-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json')
-rw-r--r--tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json22
1 files changed, 4 insertions, 18 deletions
diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
index 480d9f7460ab..ce33b2553277 100644
--- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
+++ b/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/bus.json
@@ -1,22 +1,8 @@
[
- {,
- "EventCode": "0x60",
- "EventName": "BUS_ACCESS_LD",
- "BriefDescription": "Bus access - Read"
+ {
+ "ArchStdEvent": "BUS_ACCESS_RD",
},
- {,
- "EventCode": "0x61",
- "EventName": "BUS_ACCESS_ST",
- "BriefDescription": "Bus access - Write"
- },
- {,
- "EventCode": "0xC0",
- "EventName": "EXT_MEM_REQ",
- "BriefDescription": "External memory request"
- },
- {,
- "EventCode": "0xC1",
- "EventName": "EXT_MEM_REQ_NC",
- "BriefDescription": "Non-cacheable external memory request"
+ {
+ "ArchStdEvent": "BUS_ACCESS_WR",
}
]