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| author |   Peter Ujfalusi <peter.ujfalusi@ti.com> | 2017-09-21 14:35:32 +0300 |
|---|---|---|
| committer |   Vinod Koul <vinod.koul@intel.com> | 2017-09-21 23:03:42 +0530 |
| commit | 2ccb4837c938357233a0b8818e3ca3e58242c952 (patch) | |
| tree | 8fad3dac3958c7bbceb583cd940d34efde1d536e /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
| parent | dmaengine: edma: Align the memcpy acnt array size with the transfer (diff) | |
| download | wireguard-linux-2ccb4837c938357233a0b8818e3ca3e58242c952.tar.xz wireguard-linux-2ccb4837c938357233a0b8818e3ca3e58242c952.zip | |
dmaengine: ti-dma-crossbar: Fix possible race condition with dma_inuse
When looking for unused xbar_out lane we should also protect the set_bit()
call with the same mutex to protect against concurrent threads picking the
same ID.
Fixes: ec9bfa1e1a796 ("dmaengine: ti-dma-crossbar: dra7: Use bitops instead of idr")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions