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| author |   Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2018-11-11 04:15:08 +0200 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2018-11-23 13:51:23 +0200 |
| commit | 256856efb8cc2b5468c69edf45eb0ab579833ce7 (patch) | |
| tree | 255ab951272ed61859b9e3fa1aa1b232c24835c3 /tools/perf/scripts/python/bin/export-to-postgresql-record | |
| parent | drm: rcar-du: Fix external clock error checks (diff) | |
| download | wireguard-linux-256856efb8cc2b5468c69edf45eb0ab579833ce7.tar.xz wireguard-linux-256856efb8cc2b5468c69edf45eb0ab579833ce7.zip | |
drm: rcar-du: Reject modes that fail CRTC timing requirements
The hardware requires the HDSR and VDSR registers to be set to 1 or
higher. This translates to a minimum combined horizontal sync and back
porch of 20 pixels and a minimum vertical back porch of 3 lines. Reject
modes that fail those requirements.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-record')
0 files changed, 0 insertions, 0 deletions