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| author |   Fei Yang <fei.yang@intel.com> | 2026-01-12 14:03:30 -0800 |
|---|---|---|
| committer |   Matthew Brost <matthew.brost@intel.com> | 2026-01-13 23:39:10 -0800 |
| commit | 6b2ff1d7c57ef49cd17ffe132173e05ab11a5213 (patch) | |
| tree | 1287e619818857b28f6c96dd4316d652627d2776 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | drm/xe: Replace use of system_wq with tlb_inval->timeout_wq (diff) | |
drm/xe: vram addr range is expanded to bit[17:8]
The bit field used to be [14:8] with [17:15] marked as SPARE and
defaulted to 0. So, simply expand the read to bit[17:8] assuming
the platforms using only bit[14:8] have zeros in the expanded bits.
BSpec: 54991
Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260112220330.2267122-2-fei.yang@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions