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| author |   Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> | 2026-02-09 09:44:29 +0000 |
|---|---|---|
| committer |   Georgi Djakov <djakov@kernel.org> | 2026-03-06 13:57:24 +0200 |
| commit | dfff14a4a44d8bbf33bdd08535b30981e76230f1 (patch) | |
| tree | f5ee93b18f23c6a110ce1d716e4cf16681a1c441 /tools/perf/scripts/python/bin | |
| parent | dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Mahua SoC (diff) | |
interconnect: qcom: glymur: Add Mahua SoC support
Mahua is a derivative of the Glymur SoC. Extend the
Glymur driver to support Mahua by:
1. Adding new node definitions for interconnects that differ from Glymur
(Config NoC, High-Speed Coherent NoC, PCIe West ANOC/Slave NoC).
2. Reusing existing Glymur definitions for identical NoCs.
3. Overriding the channel and buswidth, with Mahua specific values for
the differing NoCs
Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Link: https://msgid.link/20260209-mahua_icc-v3-2-c65f3dfd72c8@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions