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| author |   Stephen Boyd <sboyd@kernel.org> | 2026-03-23 17:11:31 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2026-03-23 17:11:31 -0700 |
| commit | e7a45dec40c7ad963ac4beb67cb763874be54c1b (patch) | |
| tree | a715e54b9fd9f1ed9f154cdd225242d0d4ba9ac0 /tools/perf/scripts/python/bin | |
| parent | Linux 7.0-rc5 (diff) | |
| parent | clk: renesas: r9a09g057: Remove entries for WDT{0,2,3} (diff) | |
Merge tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-fixes
Pull Renesas clk driver fixes from Geert Uytterhoeven:
- Fix ordering of module clocks arrays on Renesas RZ/V2H(P) and RZ/V2N
- Remove clocks for watchdogs meant for other CPU cores on the
Renesas RZ/V2H(P) SoC
* tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
clk: renesas: r9a09g056: Fix ordering of module clocks array
clk: renesas: r9a09g057: Fix ordering of module clocks array
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions