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| author |   Xianwei Zhao <xianwei.zhao@amlogic.com> | 2024-05-24 14:35:09 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2024-06-10 12:49:05 +0100 |
| commit | 022bd9c520d8f9dd51f29326eb369b8ec958f687 (patch) | |
| tree | 7004e001aa6f58018691c459cd466b0e188e5aa3 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | regmap: spi: Fix potential off-by-one when calculating reserved size (diff) | |
| download | wireguard-linux-022bd9c520d8f9dd51f29326eb369b8ec958f687.tar.xz wireguard-linux-022bd9c520d8f9dd51f29326eb369b8ec958f687.zip | |
spi: meson-spicc: set SPI clock flag CLK_SET_RATE_PARENT
Add SPI clock flag CLK_SET_RATE_PARENT for using pclk as parent clock.
This gives SPI more flexibility in frequency selection.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Link: https://lore.kernel.org/r/20240524-spi_pclk_setparent-v1-1-99e0ce70b66f@amlogic.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions