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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2024-01-08 19:35:04 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-01-08 19:35:04 -0800 |
| commit | 0bdf0621f89f87858ca26344378188eff194eddd (patch) | |
| tree | 3a45d79813f6bfec482ccda2626fc3c34b2c96e6 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | Merge tag 'timers-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (diff) | |
| parent | irqchip/irq-xtensa-pic: Clean up (diff) | |
| download | wireguard-linux-0bdf0621f89f87858ca26344378188eff194eddd.tar.xz wireguard-linux-0bdf0621f89f87858ca26344378188eff194eddd.zip | |
Merge tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq subsystem updates from Ingo Molnar:
- Add support for the IA55 interrupt controller on RZ/G3S SoC's
- Update/fix the Qualcom MPM Interrupt Controller driver's register
enumeration within the somewhat exotic "RPM Message RAM" MMIO-mapped
shared memory region that is used for other purposes as well
- Clean up the Xtensa built-in Programmable Interrupt Controller driver
(xtensa-pic) a bit
* tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/irq-xtensa-pic: Clean up
irqchip/qcom-mpm: Support passing a slice of SRAM as reg space
dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S
irqchip/renesas-rzg2l: Add support for suspend to RAM
irqchip/renesas-rzg2l: Add macro to retrieve TITSR register offset based on register's index
irqchip/renesas-rzg2l: Implement restriction when writing ISCR register
irqchip/renesas-rzg2l: Document structure members
irqchip/renesas-rzg2l: Align struct member names to tabs
irqchip/renesas-rzg2l: Use tabs instead of spaces
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
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