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| author |   Mikko Perttunen <mperttunen@nvidia.com> | 2014-07-08 09:30:15 +0200 |
|---|---|---|
| committer |   Peter De Schrijver <pdeschrijver@nvidia.com> | 2014-07-08 11:29:55 +0300 |
| commit | 0e548d50b95b59ccf123984bc44f17da72b12cdd (patch) | |
| tree | d41307b52bd670f755c8c6f06498037e3d743595 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | clk: tegra: export clock names for debugging (diff) | |
| download | wireguard-linux-0e548d50b95b59ccf123984bc44f17da72b12cdd.tar.xz wireguard-linux-0e548d50b95b59ccf123984bc44f17da72b12cdd.zip | |
clk: tegra: Use XUSB-compatible SATA PLL sequence
Use a sequence for enabling hardware control of the SATA PLL
that works both when using the SATA lane with SATA and when
using it with XUSB.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions