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| author |   Michael Turquette <mturquette@baylibre.com> | 2015-06-20 13:29:48 -0700 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2015-06-20 13:29:48 -0700 |
| commit | 2cd7b0432888ef2e1f8b54c1c6f8751e1e0e9b5e (patch) | |
| tree | 8ecab6ac6ef54b4ccc7b93a6a079e72a6ff7d640 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | Merge branch 'clk-exynos-cpu-clk' into clk-next (diff) | |
| parent | clk: tegra: Fix hda2codec_2x clock name for Tegra30 (diff) | |
| download | wireguard-linux-2cd7b0432888ef2e1f8b54c1c6f8751e1e0e9b5e.tar.xz wireguard-linux-2cd7b0432888ef2e1f8b54c1c6f8751e1e0e9b5e.zip | |
Merge tag 'tegra-for-4.2-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.2-rc1
This contains the EMC clock driver that's been exhaustively reviewed and
tested. It also includes a change to the clock core that allows a clock
provider to perform low-level reparenting of clocks. This is required by
the EMC clock driver because the reparenting needs to be done at a very
specific point in time during the EMC frequency switch.
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions