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| author |   Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-11-29 15:44:01 +0100 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2023-12-07 08:57:50 -0800 |
| commit | 56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4 (patch) | |
| tree | 93a3e157478714315fccff9ea5c3c303ac4395bc /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | dt-bindings: firmware: qcom,scm: document SCM on X1E80100 SoCs (diff) | |
| download | wireguard-linux-56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4.tar.xz wireguard-linux-56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4.zip | |
dt-bindings: firmware: qcom,scm: Allow interconnect for everyone
Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane.
Allow this property to be present, no matter the SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-4-4cbb567743bb@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
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