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| author |   Kishon Vijay Abraham I <kishon@ti.com> | 2017-08-18 20:28:03 +0530 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2017-08-29 16:00:39 -0500 |
| commit | 85aa13997444d7ac83da4094be513ad3fa2384b1 (patch) | |
| tree | 2b69636e1e5ae8a4c6b7290fcc3a610220bd8270 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | PCI: dwc: designware: Provide page_size to pci_epc_mem (diff) | |
| download | wireguard-linux-85aa13997444d7ac83da4094be513ad3fa2384b1.tar.xz wireguard-linux-85aa13997444d7ac83da4094be513ad3fa2384b1.zip | |
PCI: dra7xx: Reset all BARs during initialization
dra7xx has all base address registers (BAR) enabled by default. Reset all
BARs during initialization and so that BARs are enabled only if they are
actually used.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions