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author | 2024-05-14 11:45:07 +0100 | |
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committer | 2024-05-27 01:33:15 +0100 | |
commit | a7ed3a11202d90939a3d00ffcc8cf50703cb7b35 (patch) | |
tree | c9ce262f918d8a858be0d4ef6d867e67c3b3384e /tools/perf/scripts/python/call-graph-from-postgresql.py | |
parent | spi: dt-bindings: Add num-cs property for mpfs-spi (diff) | |
download | wireguard-linux-a7ed3a11202d90939a3d00ffcc8cf50703cb7b35.tar.xz wireguard-linux-a7ed3a11202d90939a3d00ffcc8cf50703cb7b35.zip |
spi: spi-microchip-core: Fix the number of chip selects supported
The SPI "hard" controller in PolarFire SoC has eight CS lines, but only
one CS line is wired. When the 'num-cs' property is not specified in
the device tree, the driver defaults to the MAX_CS value, which has
been fixed to 1 to match the hardware configuration; however, when the
'num-cs' property is explicitly defined in the device tree, it
overrides the default value.
Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions