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author | 2024-04-13 09:41:19 +0900 | |
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committer | 2024-07-09 18:28:27 -0500 | |
commit | c47f90be4c89d14051d43f0c88eafddf67c834ea (patch) | |
tree | 8efddd7ad60788f860c0017d13b28f9ba7db80e3 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
parent | PCI: dwc: ep: Enforce DWC specific 64-bit BAR limitation (diff) | |
download | wireguard-linux-c47f90be4c89d14051d43f0c88eafddf67c834ea.tar.xz wireguard-linux-c47f90be4c89d14051d43f0c88eafddf67c834ea.zip |
PCI: rockchip-host: Fix rockchip_pcie_host_init_port() PERST# handling
PCIe CEM r5.1, sec 2.9.2, mandates that the PERST# signal must remain
asserted for at least 100 usec (Tperst-clk) after the PCIe reference clock
becomes stable (if a reference clock is supplied), and for at least 100
msec after the power is stable (Tpvperl, defined by the macro
PCIE_T_PVPERL_MS).
Modify rockchip_pcie_host_init_port() to satisfy these constraints by
adding a sleep period before deasserting PERST# using the ep_gpio GPIO.
Since Tperst-clk is the shorter wait time, add an msleep() call for the
longer PCIE_T_PVPERL_MS milliseconds to handle both timing requirements.
Link: https://lore.kernel.org/linux-pci/20240413004120.1099089-2-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Krzysztof WilczyĆski <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions