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authorMike Turquette <mturquette@linaro.org>2014-07-13 07:56:45 -0700
committerMike Turquette <mturquette@linaro.org>2014-07-13 07:56:45 -0700
commitdae7df47abae9d29ca3786acd5e6fc01fdf08b63 (patch)
treeb3864d18dc7811de1c978a43c97f5807b24936de /tools/perf/scripts/python/call-graph-from-postgresql.py
parentARM: SPEAr13xx: Fix pcie clock name (diff)
parentclk: spear3xx: Set proper clock parent of uart1/2 (diff)
downloadwireguard-linux-dae7df47abae9d29ca3786acd5e6fc01fdf08b63.tar.xz
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Merge branch 'clk-fixes' into clk-next
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