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| author |   Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-09-29 14:27:39 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2017-10-01 22:51:40 -0700 |
| commit | 4792ea04bcd03b8ccfd1ae336c5deba52dd9edc9 (patch) | |
| tree | 895d407b383d3ff0378640dc0bc405e2f782c7d1 /tools/perf/scripts/python/call-graph-from-sql.py | |
| parent | r8152: add Linksys USB3GIGV1 id (diff) | |
| download | wireguard-linux-4792ea04bcd03b8ccfd1ae336c5deba52dd9edc9.tar.xz wireguard-linux-4792ea04bcd03b8ccfd1ae336c5deba52dd9edc9.zip | |
net: mvpp2: Fix clock resource by adding an optional bus clock
On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock
is optional because not all the SoCs need them but at least for Armada
7K/8K it is actually mandatory.
The binding documentation is updating accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-sql.py')
0 files changed, 0 insertions, 0 deletions