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author | 2020-04-01 19:26:26 +0800 | |
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committer | 2020-04-03 17:20:15 -0400 | |
commit | 022ac4c9c55be35a2d1f71019a931324c51b0dab (patch) | |
tree | e124fd9a471a644002743faca2984079a1ebefee /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/amdkfd: kfree the wrong pointer (diff) | |
download | wireguard-linux-022ac4c9c55be35a2d1f71019a931324c51b0dab.tar.xz wireguard-linux-022ac4c9c55be35a2d1f71019a931324c51b0dab.zip |
drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK
1.Using the FCLK DPM table to set the MCLK for DPM states consist of
three entities:
FCLK
UCLK
MEMCLK
All these three clk change together, MEMCLK from FCLK, so use the fclk
frequency.
2.we should show the current working clock freqency from clock table metric
Signed-off-by: Yuxian Dai <Yuxian.Dai@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <Kevin1.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions