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author | 2018-12-05 12:48:19 -0800 | |
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committer | 2018-12-05 12:53:07 -0800 | |
commit | 037602705109ec2ab96340bea93ad87daa3ac046 (patch) | |
tree | 616c10e2e60b8a6bfbe388366ea1c1c3f170dafb /tools/perf/scripts/python/export-to-postgresql.py | |
parent | xtensa: xtfpga.dtsi: fix dtc warnings about SPI (diff) | |
download | wireguard-linux-037602705109ec2ab96340bea93ad87daa3ac046.tar.xz wireguard-linux-037602705109ec2ab96340bea93ad87daa3ac046.zip |
xtensa: don't use l32r opcode directly
xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions