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author | 2016-05-13 23:41:28 +0300 | |
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committer | 2016-05-23 21:11:13 +0300 | |
commit | 09492498ee631041bfc60f2dc1960e246b8a7120 (patch) | |
tree | 301e38e1fa1d67cf7959dc0ac0367151ddcafc35 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915: Keep track of preferred cdclk vco frequency on SKL (diff) | |
download | wireguard-linux-09492498ee631041bfc60f2dc1960e246b8a7120.tar.xz wireguard-linux-09492498ee631041bfc60f2dc1960e246b8a7120.zip |
drm/i915: Beef up skl_sanitize_cdclk() a bit
Also verify the DPLL_CTRL1 register value in skl_sanitize_cdclk(), throw
out a few unneeded variables, and write the CDCLK_CTL check a bit more
legible way.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-10-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions