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| author |   Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2017-09-27 16:03:42 +0200 |
|---|---|---|
| committer |   Rob Herring <robh@kernel.org> | 2017-10-05 17:26:52 -0500 |
| commit | 0fc52ca54aa1f6ad8a38efea2f4b072150280008 (patch) | |
| tree | f40a2b75a1618897816af4f2991a7c35beb357a4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: rtc: add stericsson,coh901331 bindings (diff) | |
| download | wireguard-linux-0fc52ca54aa1f6ad8a38efea2f4b072150280008.tar.xz wireguard-linux-0fc52ca54aa1f6ad8a38efea2f4b072150280008.zip | |
dt-bindings: rtc: Add sirf,prima2-sysrtc bindings
Add device tree bindings for the SiRFSoC Real Time Clock.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions