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| author |   Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2022-09-27 17:59:05 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-10-10 17:32:55 -0400 |
| commit | 1298d9ab848653fc35431581d6e36662c7b6935a (patch) | |
| tree | f017ac4785aa1aa3e957f835e4b6857536062f2d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amd/display: always allow pstate change when no dpps are active on dcn315 (diff) | |
| download | wireguard-linux-1298d9ab848653fc35431581d6e36662c7b6935a.tar.xz wireguard-linux-1298d9ab848653fc35431581d6e36662c7b6935a.zip | |
drm/amd/display: Add a missing hook to DCN20
The struct timing_generator_funcs provides a hook for setting up the
maximum possible vertical dimension of display for OTG, as the panel
supports. DCN10 has a standard function named optc1_set_vtotal_min_max
which all ASICs can use to set the aforementioned hook. Since we did not
set it for DCN20, this commit initializes the set_vtotal_min_max with
the DCN10 function.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions