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author | 2017-06-13 12:23:05 +0100 | |
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committer | 2017-06-14 12:31:57 -0700 | |
commit | 155e941f49289fe73157f1c9b3c93450a2e40175 (patch) | |
tree | 62b808555d34ecefb8444bfe73764f4e88a65a96 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915/perf: Add more OA configs for BDW, CHV, SKL + BXT (diff) | |
download | wireguard-linux-155e941f49289fe73157f1c9b3c93450a2e40175.tar.xz wireguard-linux-155e941f49289fe73157f1c9b3c93450a2e40175.zip |
drm/i915/perf: per-gen timebase for checking sample freq
An oa_exponent_to_ns() utility and per-gen timebase constants where
recently removed when updating the tail pointer race condition WA, and
this restores those so we can update the _PROP_OA_EXPONENT validation
done in read_properties_unlocked() to not assume we have a 12.5MHz
timebase as we did for Haswell.
Accordingly the oa_sample_rate_hard_limit value that's referenced by
proc_dointvec_minmax defining the absolute limit for the OA sampling
frequency is now initialized to (timestamp_frequency / 2) instead of the
6.25MHz constant for Haswell.
v2:
Specify frequency of 19.2MHz for BXT (Ville)
Initialize oa_sample_rate_hard_limit per-gen too (Lionel)
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions