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author | 2019-12-02 16:44:32 +1030 | |
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committer | 2019-12-13 09:41:01 +0100 | |
commit | 15711ba6ff197c3152c655dd9c55f5c1694e8272 (patch) | |
tree | fe4edbd9e7f0ca140da78fe3260bd1c3f542b46e /tools/perf/scripts/python/export-to-postgresql.py | |
parent | pinctrl: aspeed: Use masks to describe pinconf bitfields (diff) | |
download | wireguard-linux-15711ba6ff197c3152c655dd9c55f5c1694e8272.tar.xz wireguard-linux-15711ba6ff197c3152c655dd9c55f5c1694e8272.zip |
pinctrl: aspeed-g6: Add AST2600 pinconf support
The AST2600 pinconf is a little different from previous generations of
ASPEED BMC SoCs in terms of architecture. The pull-down setting is
per-pin setting now, and drive-strength support 4 kind of value (e.g.
4ma, 8ma, 12ma, 16ma).
Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
[AJ: Trim unused pinctrl register macros]
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20191202061432.3996-8-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions