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authorJerome Brunet <jbrunet@baylibre.com>2018-12-03 18:16:40 +0100
committerKevin Hilman <khilman@baylibre.com>2018-12-04 17:04:39 -0800
commit16361ff23e20d2f967456fab9971152331b65117 (patch)
treeb9f3d7ad2a23628e6562b23946585f106508ed43 /tools/perf/scripts/python/export-to-postgresql.py
parentdt-bindings: clk: meson: add main controller clock input (diff)
downloadwireguard-linux-16361ff23e20d2f967456fab9971152331b65117.tar.xz
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arm64: dts: meson: add clock controller clock inputs
Add the clock inputs of the clock controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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