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| author |   Alex Deucher <alexander.deucher@amd.com> | 2018-11-06 11:19:00 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-11-06 14:02:38 -0500 |
| commit | 1cda5e2161b401b98e3dad561c7da0013b617f4b (patch) | |
| tree | e6a59d1587d1cd2f193151eb9d6fa885698481fb /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amd/display: Stop leaking planes (diff) | |
| download | wireguard-linux-1cda5e2161b401b98e3dad561c7da0013b617f4b.tar.xz wireguard-linux-1cda5e2161b401b98e3dad561c7da0013b617f4b.zip | |
drm/amdgpu/vega20: add CLK base offset
In case we need to access CLK registers.
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions