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| author |   Martyn Welch <martyn.welch@collabora.co.uk> | 2017-06-30 15:43:37 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2017-07-16 09:42:14 +0800 |
| commit | 1d0c7bb20c083a6e810d2142545b5606f8131080 (patch) | |
| tree | c07e654764e70c5ccbd12c11474ac8dad5fb3db9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: imx7d-sdb: Set VLDO4 outpt to 2.8V for MIPI CSI/DSI (diff) | |
| download | wireguard-linux-1d0c7bb20c083a6e810d2142545b5606f8131080.tar.xz wireguard-linux-1d0c7bb20c083a6e810d2142545b5606f8131080.zip | |
ARM: dts: imx: Correct B850v3 clock assignment
The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m
to avoid stepping on the LVDS output's toes, as the PLL can't be clocked
to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the
same time.
As we are using ipu1_di0 and ipu2_di0, ensure both are switched to
to pll2_pfd2_396m to avoid issues. The LDB driver will switch the
required IPU to ldb_di1 when it uses it to drive LVDS.
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions