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| author |   Heikki Krogerus <heikki.krogerus@linux.intel.com> | 2016-08-23 11:33:28 +0300 |
|---|---|---|
| committer |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2016-09-01 00:25:21 +0200 |
| commit | 20a875e2e86e73d13ec256781a7d55a7885868ec (patch) | |
| tree | 0f63df822fb3747325f25ecee6efe1ce8181e188 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ACPI / LPSS: Provide build-in properties of the UART (diff) | |
| download | wireguard-linux-20a875e2e86e73d13ec256781a7d55a7885868ec.tar.xz wireguard-linux-20a875e2e86e73d13ec256781a7d55a7885868ec.zip | |
serial: 8250_dw: Add quirk for APM X-Gene SoC
The APM X-Gene SoC UART is the only board that still needs
the hard-coded values, so handle it separately in
dw8250_quirks(). The other ACPI platforms are able to
provide the values with device properties.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions