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author | 2024-11-13 23:56:34 +0000 | |
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committer | 2024-11-15 15:38:40 -0800 | |
commit | 231646cb6a8cc4e94943daf223d72aefe242ec23 (patch) | |
tree | ae39f5178d763d4f278bc4a8971f60204cdcf588 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | enic: Create enic_wq/rq structures to bundle per wq/rq data (diff) | |
download | wireguard-linux-231646cb6a8cc4e94943daf223d72aefe242ec23.tar.xz wireguard-linux-231646cb6a8cc4e94943daf223d72aefe242ec23.zip |
enic: Make MSI-X I/O interrupts come after the other required ones
The VIC hardware has a constraint that the MSIX interrupt used for errors
be specified as a 7 bit number. Before this patch, it was allocated after
the I/O interrupts, which would cause a problem if 128 or more I/O
interrupts are in use.
So make the required interrupts come before the I/O interrupts to
guarantee the error interrupt offset never exceeds 7 bits.
Co-developed-by: John Daley <johndale@cisco.com>
Signed-off-by: John Daley <johndale@cisco.com>
Co-developed-by: Satish Kharat <satishkh@cisco.com>
Signed-off-by: Satish Kharat <satishkh@cisco.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Nelson Escobar <neescoba@cisco.com>
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Link: https://patch.msgid.link/20241113-remove_vic_resource_limits-v4-2-a34cf8570c67@cisco.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions