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author | 2025-04-23 13:27:03 +0300 | |
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committer | 2025-04-28 12:11:17 +0300 | |
commit | 2930db123f510651752b50db2d30d60fc965a472 (patch) | |
tree | c27f4dcbe6145059520064a2ea8a966947dd71b5 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915/alpm: Check for alpm support before accessing alpm register (diff) | |
download | wireguard-linux-2930db123f510651752b50db2d30d60fc965a472.tar.xz wireguard-linux-2930db123f510651752b50db2d30d60fc965a472.zip |
drm/i915/display: Ensure enough lines between delayed VBlank and VBlank
To deterministically capture the transition of the state machine going from
SRDOFFACK to IDLE, the delayed V. Blank should be at least one line after
the non-delayed V. Blank.
Ensure this by adding new interface into intel_psr to query number of lines
needed for vblank delay and call it from intel_crtc_vblank_delay.
v3: use existing intel_crtc_vblank_delay mechanism
v2: apply limits only when needed (VRR TG vs. Legacy TG)
Bspec: 69897
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://lore.kernel.org/r/20250423102704.1368310-1-jouni.hogander@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions