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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-12-24 12:12:13 +0200 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2025-01-06 18:05:27 -0600 |
| commit | 2b5add606ceac9fe4ea84ecd34351427b5602893 (patch) | |
| tree | 61f3e5d3e848169e2dd9f3fe05c059acbceb9cd3 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: qcom: Add CMN PLL clock controller driver for IPQ SoC (diff) | |
| download | wireguard-linux-2b5add606ceac9fe4ea84ecd34351427b5602893.tar.xz wireguard-linux-2b5add606ceac9fe4ea84ecd34351427b5602893.zip | |
dt-bindings: clock: qcom,mmcc: support LVDS PLL input for apq8064
APQ8064 / MSM8960 have separate LVDS PLL driving the LVDS / LCDC clock.
Add corresponding input to clock controller bindings.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241224-apq8064-fix-mmcc-v1-1-c95d2e2bf143@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions