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| author |   Joseph Lo <josephl@nvidia.com> | 2019-01-04 11:06:56 +0800 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2019-02-07 19:03:01 +0100 |
| commit | 2ceed59366b1405914631fc389bd46172b48f95d (patch) | |
| tree | 2932fb65d7204ebacd09468586e4643ace297b24 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: tegra: p2771-0000: Use TEGRA186_ prefix for GPIO names (diff) | |
| download | wireguard-linux-2ceed59366b1405914631fc389bd46172b48f95d.tar.xz wireguard-linux-2ceed59366b1405914631fc389bd46172b48f95d.zip | |
arm64: tegra: Add DFLL clock on Tegra210
Add essential DFLL clock properties for Tegra210.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions