diff options
| author |   Niravkumar L Rabara <niravkumar.l.rabara@intel.com> | 2023-08-01 09:02:34 +0800 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2023-08-14 05:33:41 -0500 |
| commit | 2d599bc43813cbcceeb6b0bfe864671ab517c207 (patch) | |
| tree | 0406805bd7a0214babb922999c1eb8827fdf0fce /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: clock: add Intel Agilex5 clock manager (diff) | |
| download | wireguard-linux-2d599bc43813cbcceeb6b0bfe864671ab517c207.tar.xz wireguard-linux-2d599bc43813cbcceeb6b0bfe864671ab517c207.zip | |
arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA
Add the initial device tree files for Intel Agilex5 SoCFPGA platform.
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions