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| author |   Chukun Pan <amadeus@jmu.edu.cn> | 2024-06-30 23:00:02 +0800 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2024-07-04 21:09:43 +0200 |
| commit | 2dad31528de9ea8b05245ce6ac4f76ebf8dae947 (patch) | |
| tree | 350b9827431b7f98842f7c36693adefe46669dff /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: rockchip: Add dma-names to uart1 on quartz64-b (diff) | |
| download | wireguard-linux-2dad31528de9ea8b05245ce6ac4f76ebf8dae947.tar.xz wireguard-linux-2dad31528de9ea8b05245ce6ac4f76ebf8dae947.zip | |
arm64: dts: rockchip: fix regulator name for Lunzn Fastrhino R6xS
Make the regulator name the same as those marked by schematics.
Fixes: c79dab407afd ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240630150010.55729-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions