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| author |   Chris Packham <chris.packham@alliedtelesis.co.nz> | 2022-08-03 13:16:23 +1200 |
|---|---|---|
| committer |   Gregory CLEMENT <gregory.clement@bootlin.com> | 2022-09-02 16:05:25 +0200 |
| commit | 31be791e26cf928695dba1477d62bbf55854931f (patch) | |
| tree | 686008eeb172241d850069baa18590b27bb50fd1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Linux 6.0-rc1 (diff) | |
| download | wireguard-linux-31be791e26cf928695dba1477d62bbf55854931f.tar.xz wireguard-linux-31be791e26cf928695dba1477d62bbf55854931f.zip | |
arm64: dts: marvell: Add UART1-3 for AC5/AC5X
The AC5/AC5X SoC has 4 UART blocks. Add the additional UART1-3 blocks to
the base dtsi file.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions