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| author |   Amelie Delaunay <amelie.delaunay@foss.st.com> | 2021-01-14 14:15:24 +0100 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2021-01-29 09:20:01 +0100 |
| commit | 36be90f5362a3174071a543fa73eb0f6d66bdf52 (patch) | |
| tree | 2c1138ad0a934081d66b4639d4a003dca089668c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards (diff) | |
| download | wireguard-linux-36be90f5362a3174071a543fa73eb0f6d66bdf52.tar.xz wireguard-linux-36be90f5362a3174071a543fa73eb0f6d66bdf52.zip | |
ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
usbphyc is a 48Mhz clock provider: the clock can be used as clock source
for USB OTG. Add #clock-cells property to usbphyc node to reflect this
capability.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions