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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2017-03-06 17:40:37 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2017-03-07 07:44:12 +0100 |
| commit | 37f0c804e57ac93ca37a98aa5a210c6b73e6572a (patch) | |
| tree | 831731c2de84aeb40886f70110e57c2f3eee101e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated caches (diff) | |
| download | wireguard-linux-37f0c804e57ac93ca37a98aa5a210c6b73e6572a.tar.xz wireguard-linux-37f0c804e57ac93ca37a98aa5a210c6b73e6572a.zip | |
ARM: dts: r8a7743: Remove unit-address and reg from integrated cache
The Cortex-A15 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.
Fixes: 34e8d993a68ae459 ("ARM: dts: r8a7743: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions