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authorKishon Vijay Abraham I <kishon@ti.com>2021-01-05 20:44:21 +0530
committerNishanth Menon <nm@ti.com>2021-01-11 08:19:16 -0600
commit3a6319df506f1a821abad2c71a580a2f7b78a304 (patch)
tree4821d6cd77195acc6936f6a577c605cb46d2d4a2 /tools/perf/scripts/python/export-to-postgresql.py
parentarm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0 (diff)
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arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe
x2 lane PCIe slot in the common processor board is enabled and connected to j7200 SOM. Add PCIe DT node in common processor board to reflect the same. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20210105151421.23237-7-kishon@ti.com
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