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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2025-04-26 07:51:17 +0300
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>2025-05-02 01:14:27 +0300
commit3ed12a3664b362e3462cca61d41f9a9460c9e260 (patch)
treeab7bf8ef702dc6303b218aa8f8c38510d3121a73 /tools/perf/scripts/python/export-to-postgresql.py
parentdrm/msm/mdp4: switch LVDS to use drm_bridge/_connector (diff)
downloadwireguard-linux-3ed12a3664b362e3462cca61d41f9a9460c9e260.tar.xz
wireguard-linux-3ed12a3664b362e3462cca61d41f9a9460c9e260.zip
drm/msm/dpu: allow sharing SSPP between planes
Since SmartDMA planes provide two rectangles, it is possible to use them to drive two different DRM planes, first plane getting the rect_0, another one using rect_1 of the same SSPP. The sharing algorithm is pretty simple, it requires that each of the planes can be driven by the single rectangle and only consecutive planes are considered. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/650441/ Link: https://lore.kernel.org/r/20250426-dpu-share-sspp-v7-1-6f4c719e373c@oss.qualcomm.com Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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