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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2025-01-03 21:08:55 +0100 |
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| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-01-03 21:08:55 +0100 |
| commit | 4180ca622483d6a93462bf0b171cbb3666af67e0 (patch) | |
| tree | c51c29acd3e1ca12c197c3a90a5ccf68806d65d7 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | pinctrl: renesas: rzg2l: Add audio clock pins on RZ/G3S (diff) | |
| parent | dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H (diff) | |
| download | wireguard-linux-4180ca622483d6a93462bf0b171cbb3666af67e0.tar.xz wireguard-linux-4180ca622483d6a93462bf0b171cbb3666af67e0.zip | |
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag2' into renesas-pinctrl-for-v6.14
Renesas RZ/V2H Pin Control DT Binding Definitions
Pin control DT binding definitions for the Renesas RZ/V2H (R9A09G057)
SoC, shared by driver and DT source files.
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions