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author | 2024-04-16 18:50:58 -0700 | |
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committer | 2024-04-30 10:35:42 -0700 | |
commit | 4202f62cb64b8a04782435f1006c322af2d2619b (patch) | |
tree | 080886df135391903ff5c530bc08efe5a803dbcc /tools/perf/scripts/python/export-to-postgresql.py | |
parent | Merge patch series "riscv: fix patching with IPI" (diff) | |
parent | cpumask: Add assign cpu (diff) | |
download | wireguard-linux-4202f62cb64b8a04782435f1006c322af2d2619b.tar.xz wireguard-linux-4202f62cb64b8a04782435f1006c322af2d2619b.zip |
Merge patch series "riscv: Create and document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl"
Charlie Jenkins <charlie@rivosinc.com> says:
Improve the performance of icache flushing by creating a new prctl flag
PR_RISCV_SET_ICACHE_FLUSH_CTX. The interface is left generic to allow
for future expansions such as with the proposed J extension [1].
Documentation is also provided to explain the use case.
Patch sent to add PR_RISCV_SET_ICACHE_FLUSH_CTX to man-pages [2].
[1] https://github.com/riscv/riscv-j-extension
[2] https://lore.kernel.org/linux-man/20240124-fencei_prctl-v1-1-0bddafcef331@rivosinc.com
* b4-shazam-merge:
cpumask: Add assign cpu
documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl
riscv: Include riscv_set_icache_flush_ctx prctl
riscv: Remove unnecessary irqflags processor.h include
Link: https://lore.kernel.org/r/20240312-fencei-v13-0-4b6bdc2bbf32@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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