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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-09-11 10:39:39 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-09-11 10:39:39 +0200
commit468588c8806e9f5b9cb744210f8f315210b1ed61 (patch)
tree4e5116d14c3e3d25ec5f6b428e0f5f2257faed6e /tools/perf/scripts/python/export-to-postgresql.py
parentsoc: renesas: rcar-rst: Add support for R-Car V3U (diff)
parentdt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions (diff)
downloadwireguard-linux-468588c8806e9f5b9cb744210f8f315210b1ed61.tar.xz
wireguard-linux-468588c8806e9f5b9cb744210f8f315210b1ed61.zip
Merge tag 'renesas-r8a779a0-dt-binding-defs-tag' into renesas-drivers-for-v5.10
Renesas R-Car V3U DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car V3U (R8A779A0) SoC, shared by driver and DT source files.
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