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| author |   Dmitry Osipenko <digetx@gmail.com> | 2020-11-04 19:48:47 +0300 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-11-06 19:32:10 +0100 |
| commit | 48126d7884ab56c2352ae328d5fd42c7d2d7b125 (patch) | |
| tree | cd9a8204b6915e13d4ee9a8854312e9def2b057f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: memory: tegra30: emc: Document new interconnect property (diff) | |
| download | wireguard-linux-48126d7884ab56c2352ae328d5fd42c7d2d7b125.tar.xz wireguard-linux-48126d7884ab56c2352ae328d5fd42c7d2d7b125.zip | |
dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator
Document new OPP table and voltage regulator properties which are needed
for supporting dynamic voltage-frequency scaling of the memory controller.
Some boards may have a fixed core voltage regulator, hence it's optional
because frequency scaling still may be desired.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201104164923.21238-12-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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