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| author |   Neil Armstrong <narmstrong@baylibre.com> | 2019-09-19 11:36:25 +0200 |
|---|---|---|
| committer |   Jerome Brunet <jbrunet@baylibre.com> | 2019-10-01 14:51:07 +0200 |
| commit | 4a079643fc73247667000ba54fbccc2acadb04a5 (patch) | |
| tree | 48a831877dc16fa714d4b8575a36c778e43a9217 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate (diff) | |
| download | wireguard-linux-4a079643fc73247667000ba54fbccc2acadb04a5.tar.xz wireguard-linux-4a079643fc73247667000ba54fbccc2acadb04a5.zip | |
clk: meson: g12a: fix cpu clock rate setting
CLK_SET_RATE_NO_REPARENT is wrongly set on the g12a cpu premux0 clocks
flags, and CLK_SET_RATE_PARENT is required for the g12a cpu premux0 clock
and the g12b cpub premux0 clock, otherwise CCF always selects the SYS_PLL
clock to feed the cpu cluster.
Fixes: ffae8475b90c ("clk: meson: g12a: add notifiers to handle cpu clock change")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions