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| author |   Florian Fainelli <f.fainelli@gmail.com> | 2020-02-28 11:31:43 -0800 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-09-04 13:42:16 -0700 |
| commit | 4e5cafa8b3ea45cb17aa6b538fb439abefc0029e (patch) | |
| tree | bd309ca3e5b991f3ecb1d40dbc17333d4c18dac0 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: bcm: Enable BCM7038_L1_IRQ for ARCH_BRCMSTB (diff) | |
| download | wireguard-linux-4e5cafa8b3ea45cb17aa6b538fb439abefc0029e.tar.xz wireguard-linux-4e5cafa8b3ea45cb17aa6b538fb439abefc0029e.zip | |
ARM: brcmstb: Add debug UART entry for 72615
72165 has the same memory map as 7278 and the same physical address for
the UART, alias the definition accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions