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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-12-27 14:35:56 +0100 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2022-02-09 10:43:03 -0600 |
| commit | 50ae688a08a77260249cb5022a441b8a87903405 (patch) | |
| tree | fb2fc44f8a149fd3060d23d6dcdafd983e825d61 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: stratix10: align regulator node names with dtschema (diff) | |
| download | wireguard-linux-50ae688a08a77260249cb5022a441b8a87903405.tar.xz wireguard-linux-50ae688a08a77260249cb5022a441b8a87903405.zip | |
arm64: dts: agilex: add board compatible for SoCFPGA DK
The Intel SoCFPGA Agilex 10 SoC Development Kit is a board with
Agilex, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions