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author | 2024-04-02 16:51:46 +0300 | |
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committer | 2024-04-03 14:26:11 -0400 | |
commit | 51bc63392e96ca45d7be98bc43c180b174ffca09 (patch) | |
tree | b0841ba14f3941a7106125150c6a9b70fa401a09 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/i915/dp: Fix the computation for compressed_bpp for DISPLAY < 13 (diff) | |
download | wireguard-linux-51bc63392e96ca45d7be98bc43c180b174ffca09.tar.xz wireguard-linux-51bc63392e96ca45d7be98bc43c180b174ffca09.zip |
drm/i915/mst: Limit MST+DSC to TGL+
The MST code currently assumes that glk+ already supports MST+DSC,
which is incorrect. We need to check for TGL+ actually. ICL does
support SST+DSC, but supposedly it can't do MST+FEC which will
also rule out MST+DSC.
Note that a straight TGL+ check doesn't work here because DSC
support can get fused out, so we do need to also check 'has_dsc'.
Cc: stable@vger.kernel.org
Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-6-ville.syrjala@linux.intel.com
(cherry picked from commit c9c92f286dbdf872390ef3e74dbe5f0641e46f55)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions